基于硅纳米线缺陷辅助隧穿肖特基二极管研究

介绍了铂（Pt）/p型硅纳米线（p-SiNWs）肖特基二极管的制备方法,在300~370 K温度范围内,测量了Pt/p-SiNWs肖特基二极管I-V特性.根据热发射（TE）、产生-复合（GR）,隧穿（TU）和漏电流（RL）理论模型,拟合了肖特基二极管电流传输机制,拟合结果说明Pt/p-SiNWs肖特基二极管中电流传输机制为缺陷辅助隧穿机制.此外,根据实验数据计算了肖特基二极管主要特征参数,二极管理想因子n随温度升高而减小,势垒高度Φb0随温度升高而增加,并且隧穿参数E0不随温度而变化.     

氧化锌压敏电阻不稳定性机理探讨

本文研究氧化锌压敏电阻在连续交变电压作用下,在不同的温度和外加电压条件下漏电流随时间变化的规律.分析了氧化锌表面耗尽区中的正离子电荷及耗尽区边界扩散长度范围内空穴电荷在晶粒表面积累的物理过程.根据实验结果,提出漏电流不稳定性的机理是锌离子在晶粒表面积累,降低了氧化锌表面肖特基势垒的高度,使漏电流上升.文中简便地推导出漏电流上升的速率方程.实验还发现外加电压的频率增高时,漏电流上升的速率增大.     

宽禁带SiC肖特基势垒二极管的研制

采用微电子平面工艺 ,高真空电子束蒸发金属Ni作肖特基接触 ,多层金属Ni、Ti、Ag合金作欧姆接触 ,SiO2 绝缘环隔离减小高压电场集边效应等技术 ,制作出Ni/4H SiC肖特基势垒二极管 (SBD) .该器件在室温下反向击穿电压大于 450V ,对应漏电流为 6× 1 0 -6 A .并对实验结果进行分析模拟 ,理想因子为 1 .73 ,肖特基势垒高度为 1 .2 5V ,实验表明 ,该器件具有较好的正向整流特性和较小的反向漏电流 .     

4H-SiC肖特基二极管温度传感器模型分析

在4H-SiC肖特基二极管正向电流热电子发射理论基础上,得出了理想因子、势垒高度及串联电阻随温度变化的特性值,并结合考虑三者随温度变化的特性提出了一种计算正向电流密度的理论模型.通过对肖特基二极管的正向特性在300～500 K的温度范围内的电流-电压曲线模拟,表明温度升高对正向特性的影响比较显著,肖特基二极管适合于高温工作,同时表明热电子发射是其主要运输机理.     

高压4H-SiC肖特基二极管的模拟及研制

结终端技术能提高4 H-SiC肖特基势垒二极管器件的耐压性能.利用仿真软件ISE-TCAD10.0对具有结终端扩展JTE保护的4 H-SiC SBD器件进行了仿真研究,并依据仿真优化好的参数试制了器件.实验测试结果表明,模拟优化结果与实验测试器件的结果一致性较好,实测此器件的反向电压值达2 000 V,接近理想击穿耐压88%,漏电流数值为0.1mA/cm2.     

肖特基二极管对微波响应的多物理场协同计算

以型号为HSMS 282c的肖特基二极管为例,利用多物理场协同算法对其微波响应特性进行了计算.通过比较器件在有或无封装时对特定频率的响应情况,发现封装可使器件的耗散功率增加87%.本文还对比了肖特基二极管在不同频率微波激励下的平均耗散功率,发现器件的耗散功率在 35 GHz附近存在峰值.当二极管的工作频率高于32 GHz时,耗散功率会随环境温度的增加而增加.研究结果对于半导体器件的微波效应研究具有重要的参考价值.     

p型Al/6H-SiC肖特基二极管特性的研究

作者研究了p型Al/6H -SiC肖特基二极管的基本制作工艺及其电学参数 .采用电流 -电压法 (I～V) ,测试了肖特基二极管的理想因子n和肖特基势垒高度b.对其基本电学参数n和b 的温度特性进行了研究 .分析了串联电阻对I～V特性的影响 .     

高压反偏硅PN结的漏电流对研磨损伤层的影响

本文通过对硅整流管反偏直流产生电流温度关系、伏安特性和对应的深能级瞬态谱(DLTS)的研究,揭示了均为硬转折特性的试样漏电流有较大差异的根源是:表面研磨损伤层引入了新的深中心,使PN结的漏电流增加了一个隧道电流分量;并分析了导电机理.根据理论分析,修正了反偏PN结漏电流理论.     

4H-SiC肖特基势垒二极管温度特性研究

采用平面工艺，用高真空电子束分别蒸发金属Ni、Ti做肖特基接触，采用多层金属Ni、Ti、Ag合金做欧姆接触，制作出Ni／4H—SiC、Ti／4H—SiC肖特基势垒二极管(SBD)．研究了在-100～500℃之间器件正向直流压降与温度变化的关系．实验表明：当通过肖特基势垒二极管的正向电流恒定时，器件正向直流压降随温度变化具有线性关系，斜率约为1．8mV／℃，由此，提出了以4H—SiC肖特基势垒二极管为基础的高温温度传感器模型．     

硅半导体放电加工中的肖特基势垒特性研究

金属夹具与半导体接触会形成肖特基势垒,为了研究该势垒对半导体放电加工的影响,利用二极管和电阻模型建立了等效电路.固定端和放电端形成的肖特基势垒,都可等效成二极管,在放电回路中一个处于正向偏置,另一个处于反向偏置.本文通过两端金属进电的方法,研究了肖特基势垒对放电电流的影响,理论研究发现了半导体放电伏安曲线的3个特征量:导通角、击穿点和击穿角,并通过实验方法测量伏安曲线,找到了这3个特征量的关系.击穿角由电路中的电阻决定,与肖特基势垒无关,而导通角和击穿点由肖特基势垒决定,与电阻无关.     

半导体器件模拟软件ISE—TCAD

本文的研究目的是对半导体模拟软件ISE—TCAD进行详细介绍,旨在介绍软件的模拟方法,并利用仿真软件ISE—TCAD对其在室温下的正向伏安特性与反向伏安特性进行了模拟仿真,并取得了有价值的数据．．从模拟图的结果可知室温（303K）且偏压较低时,电流随着电压呈指数关系增长。W／SiC肖特基势垒二极管的开启电压约为0．2V;偏压较高时,电流增加缓慢,串联电阻效应明显。模拟值表明反向电流数值比正向数值小几个数量级,     

新型4H-SiC肖特基二极管的仿真与分析

设计了斜面结构碳化硅肖特基二极管(4H-SiC SBD)并且在器件中加入场环结构,通过基于半导体物理理论的计算机辅助设计软件(Silvaco-TCAD)分析计算了常规结构和新结构SiC-SBD器件的V-I特性、击穿电压、温度热学分布。对比计算结果,可知新结构SiC-SBD器件击穿电压提高至2300V,导通电阻减小,温度热学分布明显优于常规结构SiC-SBD器件。     

环栅肖特基势垒MOSFET解析电流模型

肖特基势垒金属氧化物半导体场效应晶体管(Metal-Oxide-Semiconductor FieldEffect Transistor,MOSFET)的电流一般需要通过载流子的费米狄拉克分布对能量积分来计算或自洽迭代数值计算,为降低其复杂性,本文采用若干拟合参数,考虑镜像力势垒降低效应、偶极子势垒降低效应和小尺寸下量子化效应对肖特基势垒高度的影响,给出了环栅肖特基势垒MOSFET一种新的解析电流模型。所提出的电流模型与文献报道实验数据符合较好,验证了模型的正确性,对环栅肖特基势垒MOSFET器件以及电路设计提供了一定的参考价值.     

Au/(C/SiO2)/p-Si结构中的电流输运机理研究

采用射频磁控溅射方法制备了镶嵌纳米碳粒的SiO2薄膜，利用Au／（C／SiO2）／p-Si结构的I-V特性曲线，对其电流输运机理进行了分析．结果表明，正向偏压较小时，薄膜中的电流符合欧姆电流输运机制；正向偏压较大时，薄膜中的电流主要是Schottky发射和Frenkel-Poole发射2种电流输运机制的共同作用结果．这一结论与样品的EL（electroluminescence）是由SiO2中的发光中心引起的结论相一致．     

Modeling of a Schottky Diode in CMOS Process with a Flexible “Open-Through” On-Chip De-embedding Method

Modeling of Schottky diodes in the CMOS process is a key step in ultra-high frequency(UHF) radio frequency identification(RFID) transponder designs.Accurate Schottky diode models need both DC and RF models.Conventional DC models of the Schottky diode fail to predict the forward leakage current,which is crucial for precise simulation results.This paper presents a Schottky diode model with an additional diode which gives the correct forward leakage current.The RF model of the Schottky diode is constructed based on the measured S-parameters.Then,an on-chip de-embedding process is needed to remove the parasitics due to the pads and interconnection lines in the S-parameter test.A flexible "open-through" on-chip de-embedding method is proposed which only requires an "open" dummy and a "through" dummy,with all the lumped and distributed parasitics equivalent to two-port networks to give sufficient high-frequency de-embedding accuracy.By the help of this de-embedding method and the new DC model,the accuracy of the established diode model could be guaranteed.The Schottky diode model is verified by comparison between measurements and simulations and successfully applied to an RFID transponder design.     

Bias polarity-sensitive electrical failure characteristics of ZnSe nanowire in metal–semiconductor–metal nanostructure

The effect of bias polarity on the electrical breakdown behavior of the single ZnSe nanowire(NW) in the metal–semiconductor–metal(M–S–M)nanostructure under high current density and high bias conditions has been studied in the present paper. The experimental results show that the failure of the ZnSe NW in M–S–M nanostructure was sensitive to bias polarity since the NW commonly collapsed at the negatively biased Au metal electrode due to high Joule heat produced in NW at the reversely biased Schottky barrier. Thus, the electrical breakdown behavior of the ZnSe NW was highly dominated by the cathode-controlled mode due to the high resistance of the depletion region of ZnSe NW at the reversely biased Schottky contact.     

A generalized Norde plot for reverse biased Schottky contacts

When a metal makes intimate contact with a semiconductor material, a Schottky barrier may be created. The Schottky contact has many important applications in the integrated circuit (IC) electronics field. The parameters of such contacts can be determined from their current-voltage (I-V) characteristics. The literature contains many proposals for extracting the contact parameters using graphical methods. However, such methods are generally applicable only to contacts with a forward bias, whereas many Schottky contacts actually operate under a reverse bias. Accordingly, the present study proposed a generalized reverse current-voltage (I-V) plot which enables the series resistance, barrier height, and ideality factor of a reverse biased Schottky contact to be extracted from a single set of I-V measurements. A theoretical derivation of the proposed approach was presented and a series of validation tests were then performed. The results show that the proposed method is capable of extracting reliable estimates of the contact parameters even in the presence of experimental noise.     

Reverse leakage current in AlGaN-based ultraviolet light-emitting diodes

The reverse leakage characteristics of AlGaNbased ultraviolet light-emitting diodes fabricated on sapphire substrate are studied by temperature-variable current–voltage(I–V)measurement from 300 to 450 K.At low-reverse bias range(0–0.5 V),the reverse leakage current exhibits tunneling characteristics.Meanwhile,under a more negative reverse bias range([0.5 V),the log(I)–log(V)plots exhibit close-to-linear dependency,which is in good agreement with the transport mechanism of space-charge limited current.A phenomenological leakage current model focusing on electron transmission primarily through continuous defect band formed by linear defects like dislocations is suggested to explain the reverse current–voltage characteristics.