| 一种改进的STUMPS架构 |
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| 引用本文： | 陈建慧.一种改进的STUMPS架构[J].无锡职业技术学院学报,2008,7(4):55-58. |
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| 作者姓名： | 陈建慧 |
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| 作者单位： | [1]无锡职业技术学院,江苏无锡214121; [2]江南大学信息工程学院,江苏无锡214122 |
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| 摘 要： | 由于科学技术的快速提高,单一芯片中所能包含的晶体管的数目越来越多,相对造成了芯片可测试度的降低,以及测试成本的增加。传统的STUMPS-based LBIST测试方法中,常会有故障覆盖率不够高和测试时间太长的缺点。该文提出了用Test-Per-Clock的方式来处理待测电路,并配合空间压缩器和存储装置使用,降低了故障覆盖率,减少了测试时间。
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| 关 键 词： | 内建自测试 多输入特征寄存器 线性反馈移位寄存器 |
Improvement of STUMPS |
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| Authors: | CHEN Jian-hui |
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| Institution: | CHEN Jian - hui( 1. Wuxi Institute of Technology, Wuxi 214121, China ;2. Jiangnan University, Wuxi 214122, China) |
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| Abstract: | Due to the fast improvement of process technology, the number of transistors continuously increases in a chip decreasing the testability and increasing the testing cost. The conventional STUMPS - based L - BIST way has some disadvantages. One is fault coverage rate not good enough, and the other is the test time too long. In the paper, the author tries to test the CUT with Test - Per- Clock, space compression and storage device. So we can get rather high fault coverage rate in very short test time. |
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| Keywords: | BIST MISR LFSR |
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