消除CPLD／FPGA器件设计中的毛刺

复杂可编程逻辑器件CPLD和现场可编程门列阵PFGA在现代数字系统设计中起着越来越重要的作用，但系统设计中出现的毛刺往往成为系统设计成功与否的障碍。本文介绍了CPLD／FPGA设计中毛刺产生的原因，详细分析了在EDA环境下对毛刺进行判断与定位的原理，论述了利用EDA工具消除毛刺的3种方法与具体实现。通过实例分析表明，借助于功能强大的EDA工具，不仅可以在设计中十分方便地发现毛刺，而且可以精确定位，进而寻找消除毛刺的最佳方法和进行结果的验证。

Eliminate the glitch in design of CPLD/FPGA

Complex Programmable Logic Device(CPLD) and Field Programmable Gate Array(FPGA) play more and more important roles in design of modern digital system. But sometimes, the glitch in design of the system become handicap of succeedable design. This paper analyses the cause, judge and locate of glitch in design of modern digital system apply the component of CPLD/FPGA. Three methods about eliminate the glitch make use of EDA tools are discussed and some examples are given.