| 数字存储示波器采样信息处理系统的设计与实现 |
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| 引用本文： | 钟惠球,;林盛鑫,;丁福财.数字存储示波器采样信息处理系统的设计与实现[J].东莞理工学院学报,2014(3):17-20. |
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| 作者姓名： | 钟惠球 ;林盛鑫 ;丁福财 |
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| 作者单位： | [1]东莞理工学院 资产后勤管理处,广东东莞523808; [2]东莞理工学院 电子工程学院,广东东莞523808; [3]东莞理工学院 总务部,广东东莞523106 |
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| 摘 要： | 提出采用现场可编程逻辑器件(FPGA)来设计数字存储示波器的采样信息处理系统,大大提高了系统设计的灵活性,硬件功能像软件一样可通过编程来修改,可快速更改数据采样方法,修正采样错误,有效地提高数字存储示波器的采样效率和数据的可靠性。
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| 关 键 词： | 数字存储示波器 可编程逻辑器件 锁相环 分频器 等效采样 |
Design and Implementation of Sampling Information Processing System in DSO |
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| Institution: | ZHONG Hui-qiu, LIN Sheng-xin, DING Fu-cai(1.Logistics ang Managenebt Division ,Dongguan University of Technology,Dongguan 523808,china;2.College of Electronic Engineering,Donghuan University of Technology ,Dongguan 523808,China;3.General Affairs Department ,Dongguan University of Technology ,Dongguan 5231.6 ,China) |
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| Abstract: | This thesis makes use of field programmable logic device （ FPGA） to design a sampling digital storage oscillo-scope Information Processing module , greatly improving the flexibility of system design .Hardware functions can be changed as soft-ware can be programmed .Moreover , you can quickly change the data sampling methods and correct sampling errors in order to in -crease the sampling efficiency of digital storage oscilloscope and data reliability . |
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| Keywords: | FPGA Phase-Locked Loop divider equivalent sampling |
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