一种收发逻辑环回测试方法的设计与实现

环回测试通常用于检查和分析芯片收发模块接口电路、内部逻辑以及传输线路物理实现的正确性。逻辑仿真过程中的环回测试主要用来验证收发模块逻辑设计以及环回设计功能的正确性。调试阶段的环回测试能够快速定位传输线路物理实现的故障点,为研制工作节省时间开销和人力成本。介绍了一种优化设计实现的物理层芯片环回设计和测试方法,更加有效地缩短了调试周期。

Design and Implementation of A Method for Transceiver Loopback Test

Loop back test is commonly used to examine and analyze chip transceiver interface circuit,the internal logic as well as the physical realization of transmission lines.Logic simulation of the loop-back design.Commissioning phase of the loopback test can quickly locate the failure of physical realization,in order to save time overhead and labor costs.An optimized design is described to achieve the physical layer chip loop-back design and test methods,more effective to shorten the debug cycle.