弹载飞参高速测试系统关键技术分析与设计验证

针对某型制导炮弹发射与飞行过程中部分参数存在脉宽极窄的现象,弹载测试系统对采样率要求更高,而选用高采样率的模数转化器(ADC)存在设计成本高且难以满足实际所需的通道数量、采样率及采样精度等综合问题。基于低成本、小型化、可靠性高的原则,课题组提出了一种基于多ADC菊花链式设计的方法,解决了单ADC采样率局限的难题,高速数据流经过FPGA乒乓操作处理以减小缓存空间及速度的压力,实现了总体采样率成倍提高,设计了一种采样率高、采集精度高、通道多、体积小、成本低的弹载测试系统。该系统能够广泛适用于弹体空间狭小的环境,在不影响弹体自身装药量与打击效果的前提下,可靠地完成弹载试验测试任务。通过试验充分验证了该系统的功能有效性及测试准确性,具有一定的工程应用价值。

Key Technology Analysis and Design Verification of High Speed Test System for Missile Flying

In order to the fact that some parameters of a certain type of guided projectile are extremely narrow in pulse width during the flight and flight process, the missile load test system requires higher sampling rate, while the high sampling rate analog-to-digital converter (ADC) has high design cost and is difficult to design. Meet the comprehensive problem of the number of channels, sampling rate and sampling accuracy required. Based on the principle of low cost, miniaturization and high reliability, this paper proposes a method based on multi-ADC daisy chain design, which solves the problem of single ADC sampling rate limitation. High-speed data stream is processed by FPGA ping-pong operation to reduce buffer. The space and speed pressures have doubled the overall sampling rate, and a missile-loaded test system with high sampling rate, high acquisition accuracy, multiple channels, small size and low cost has been designed. The system can be widely applied to an environment with a small space of the missile body, and the missile load test task can be reliably completed without affecting the amount of the body"s own charge and the impact effect. The functional validity and test accuracy of the system are fully verified by experiments, which have certain engineering application value.