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基于DDR内存总线的高速网络接入技术
引用本文:张晓彤,王景存,王沁,刘兰军.基于DDR内存总线的高速网络接入技术[J].北京科技大学学报,2007,29(11):1158-1162.
作者姓名:张晓彤  王景存  王沁  刘兰军
作者单位:1. 北京科技大学信息工程学院,北京,100083
2. 北京科技大学信息工程学院,北京,100083;武汉科技大学信息科学与工程学院,武汉,430081
基金项目:中国科学院计算所知识创新工程
摘    要:在机群系统中,机群的互连网络性能对整个机群系统的性能有着至关重要的影响.机群系统要求互连网络具有高带宽、低延迟、高可靠等特性,传统的互连网络接入方法基本上基于PCI接口.本文提出了基于DDR DIMM内存总线的接入思想,采用可编程逻辑器件FPGA实现网络接口设计,通过直接读写内存方式提高并行接入带宽,并将部分通讯协议下载到网卡上以提高计算和通讯的速度.实测表明,在不包括上层协议的情况下,接口卡的数据接入带宽可达3120 Mbps,给出了基于FPGA的实现方法,并用Xilinx Virtex-Ⅱ Pro-20 FPGA进行了仿真和验证.

关 键 词:网络  高速互连  网络接口卡  DDR  DIMM  FPGA  内存  总线  高速网络  接入技术  memory  based  technology  access  验证  仿真  Xilinx  方法  Mbps  数据接入  接口卡  情况  上层协议  速度  通讯协议  计算
收稿时间:2006-07-31
修稿时间:2006-11-23

High-speed network access technology based on DDR memory bus
ZHANG Xiaotong,WANG Jingcun,WANG Qin,LIU Lanjun.High-speed network access technology based on DDR memory bus[J].Journal of University of Science and Technology Beijing,2007,29(11):1158-1162.
Authors:ZHANG Xiaotong  WANG Jingcun  WANG Qin  LIU Lanjun
Abstract:In cluster, the performance of an interconnection network exhibits significant effect on that of the whole cluster system. The interconnection network is required to possess the characteristics of high bandwidth, low delay and high reliability. Traditional interconnection network access technologies are almost based on the peripheral component interface (PCI). This paper proposed a design ideology of access based on DDR DIMM interface and presented a design of the network interface on FPGA. The access bandwidth could be increased by reading and writing memory directly. Parts of the communication protocols were downloaded into the network interface card (NIC) to improve the parallel of calculation and communication. Measurements indicate that excluding the upper layer protocol, the access bandwidth of the NIC can reach to 3 120 Mbps. An implementation approach of the NIC for FPGA was put forward and was simulated on an XC2VP20 FPGA chip of Xilinx Corporation.
Keywords:network  high-speed interconnection  network interface card  DDR  DIMM  FPGA
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