一种基于DSP和FPGA的雷达信号分选电路设计

设计了一种基于DSP和FPGA的雷达信号分选电路,对密集的雷达信号进行分选识别。系统利用FPGA采集信号的特征参数以及对参数进行预处理;采用了累积差值直方图算法,根据信号脉冲宽度对数据分组,多片DSP协同处理实现信号分选。工程实践表明:该电路对常规雷达信号分选效果良好,处理速度快,系统可靠性好。

A Circuitry for Deinterleaving Radar Signals Based on DSP and FPGA

A circuitry based on DSP and FPGA was designed in order to deinterleave radar signals with different pulse repetition interval.The parameters of radar signals are detected by the circuitry designed in FPGA.The prior sorting of these parameters is also designed in FPGA.Based on the cumulative difference histogram(CDIF) and the width of pulse(PW),DSP processors process the parameters and gives the pulse repetition intervals(PRIs).It is proved that this system works well with high speed and reliability when deinterleaving ordinary radar signals.