一种使用BU-65170内部RAM实现双缓冲的星载1553B总线数据传输技术

星载1553B总线数据传输通常需要使用外部RAM缓存待发送数据,使用外部RAM带来系统功耗和面积的增加,也增加了系统的复杂性。提出了一种使用1553B芯片内部RAM实现双缓冲的数据传输方案。此方案采用FPGA作为主控芯片,BU-65170作为1553B总线控制芯片,利用BU-65170内部RAM的两个地址空间段构成双缓冲,避免使用外部RAM,简化了系统硬件设计,提高了系统的可靠性。对双缓冲区采取交替更新访问方式,实现了1553B总线数据的可靠传输。此方案已成功应用于星载GNOS掩星探测仪。

A 1553B Bus Data Transmission Technology Using BU-65170 Internal RAM for Double-buffer on Payload

Generally an external RAM is used to cache data to be sent by 1553B bus on payloads, using external RAM will increase system power consumer and area, as well to system complexity. A data transmission scheme using 1553B chip internal RAM for double-buffer is proposed. FPGA is the core control unit, and BU-65170 is the control chip of 1553B bus. To simplify hardware design, no use external RAM, but use two different spaces in BU-65170 internal RAM for double-buffer, updated and accessed in return, to achieve 1553B bus data transmission reliably. The scheme has been successfully applied to the payload of GNOS occultation Detector.