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升余弦滚降基带成型内插滤波器的FPGA实现
引用本文:陈东华.升余弦滚降基带成型内插滤波器的FPGA实现[J].华侨大学学报(自然科学版),2006,27(3):310-312.
作者姓名:陈东华
作者单位:华侨大学信息科学与工程学院,福建,泉州,362021
摘    要:无线数字通信中,内插滤波器用来对基带信号进行脉冲成型滤波,以限制发送信号的带宽,降低带外干扰.研究一种应用于无线数字传输系统的高速FIR成型滤波器的设计方法,该方法采用分布式查找表算法,以降低硬件开销和提高处理速度为目标,是基于现场可编程门阵列(FPGA)并实现升余弦滚降基带成型内插滤波器的硬件电路.最后,通过实测波形与仿真波形证实方法的优越性.

关 键 词:升余弦滚降基带  成型滤波器  分布式算法  查找表  FPGA
文章编号:1000-5013(2006)03-0310-03
收稿时间:2005-10-04
修稿时间:2005-10-04

Implementation of Raised-Cosine Roll-Off Pulse Shaping Interpolated Filter Based on FPGA
Chen Donghua.Implementation of Raised-Cosine Roll-Off Pulse Shaping Interpolated Filter Based on FPGA[J].Journal of Huaqiao University(Natural Science),2006,27(3):310-312.
Authors:Chen Donghua
Institution:College of Information Science and Engineering, Huaqiao University, 362021, Quanzhou, China
Abstract:In wireless digital communications,base-band signals are specially shaped using interpolated filter to suppress out-band interferes.Design methods of a high speed FIR shaping filter applied in wireless digital transmission systems are discussed in detail.Hard ware circuits for raised-cosine roll-off pulse shaping filter based on FPGA are implemented ac-cording to distributed lookup table algorithms aiming to lower expenses and increase working speed.The superiority of the methods was proved through the conformity of results obtained from experiments and simulations.
Keywords:raised-cosine roll-off base-band  shaping filter  distributed algorithm  lookup table  FPGA
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