| 数字式频率相位差测量仪的设计 |
| |
| 引用本文： | 周永明,洪远泉.数字式频率相位差测量仪的设计[J].韶关学院学报,2004,25(6):33-35. |
| |
| 作者姓名： | 周永明 洪远泉 |
| |
| 作者单位： | 韶关学院,信息工程学院,广东,韶关,512005 |
| |
| 摘 要： | 以单片机为控制核心，用可编程逻辑控制芯片CPLD，产生双32位的计数器和相位差检测器，进行等精度的频率、相位差测量．计数器的计数时间宽度和显示方式由键盘设定．单片机读入计数值，进行浮点运算，测量结果显示于液晶屏上。
|
| 关 键 词： | 频率 相位差 等精度测量 单片机 CPLD 液晶显示 |
| 文章编号： | 1007-5348(2004)06-0033-00 |
| 修稿时间： | 2004年2月26日 |
Design on the Digital Instrument of Frequency and Phase Difference |
| |
| ZHOU Yong-ming,HONG Yuan-quan.Design on the Digital Instrument of Frequency and Phase Difference[J].Journal of Shaoguan University(Social Science Edition),2004,25(6):33-35. |
| |
| Authors: | ZHOU Yong-ming HONG Yuan-quan |
| |
| Abstract: | This design takes the single chip microcomputer as the control nucleus. The double thirty-two bit counter and phase difference detecter have been made by using the complex programmable logic device(CPLD) for measuring the frequency and phase difference on equal accuracy. The width of count time and display style can be set respectively by keyboard .The results are displayed on character LCD(liquid crystal display) after the single chip microcomputer processed the data coming from CPLD by float arithmetic. |
| |
| Keywords: | frequency phase difference equal accuracy measure single chip microcomputer CPLD LCD |
| 本文献已被 CNKI 维普 万方数据 等数据库收录！ |
