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数字保护算法的FPGA实现方法
引用本文:阮建国,林家骏.数字保护算法的FPGA实现方法[J].华东理工大学学报(自然科学版),2006,32(4):449-455.
作者姓名:阮建国  林家骏
作者单位:华东理工大学信息科学与工程学院,上海,200237
摘    要:介绍了一种基于现场可编程逻辑陈列(FPGA)的数字保护算法的实现方法,将算法的实现平台由微控制器(M CU)转向FPGA,构成基于FPGA的数字保护算法专用芯片。仿真结果表明:当每周期取40个采样点时,完成全波傅氏滤波或最小二乘滤波算法仅需几个微秒,大大快于M CU的处理速度,因而可以有效地克服精度与速度之间的矛盾。

关 键 词:继电保护  FPGA  数字保护算法  全波傅氏滤波  最小二乘滤波
文章编号:1006-3080(2006)04-0449-07
收稿时间:2005-03-07
修稿时间:2005年3月7日

An Implementation Method of Digital Protection Algorithms Based on FPGA
RUAN Jian-guo,LIN Jia-jun.An Implementation Method of Digital Protection Algorithms Based on FPGA[J].Journal of East China University of Science and Technology,2006,32(4):449-455.
Authors:RUAN Jian-guo  LIN Jia-jun
Abstract:This paper presents an implementation method of digital protection algorithms based on FPGA.The implementation of protection algorithms is accomplished by FPGA instead of MCU.ASIC chip of digital protection algorithm can be made based on FPGA.Simulation result shows that merely several(microseconds) are required for accomplishing the work of full-cycly Fourier filtering or least-square filtering in case of 40 sampling points per cycle.So the processing speed of the system is much faster than that of the system based on MCU and the conflict between action precision and speed can be overcome effectively.
Keywords:relay protection  FPGA  digital protection algorithm  full-cycle Fourier filtering  leastsquare filtering
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