| 一种RS(15,9)译码器的FPGA实现 |
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| 引用本文： | 屈鹏,柏鹏,李明阳,王峰,林晋福.一种RS(15,9)译码器的FPGA实现[J].科学技术与工程,2013,13(11):2980-2984. |
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| 作者姓名： | 屈鹏 柏鹏 李明阳 王峰 林晋福 |
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| 作者单位： | 空军工程大学装备管理与安全工程学院,空军工程大学综合电子信息系统与电子对抗技术研究中心,空军工程大学装备管理与安全工程学院,陆军航空兵学院第二飞行训练团,空军工程大学综合电子信息系统与电子对抗技术研究中心 |
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| 基金项目： | 陕西省重点实验室重点项目基金 |
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| 摘 要： | 提出一种基于新的域内乘法器的RS(15,9)译码器FPGA解决方案,通过设计合理的流水线和模块化结构,使得此译码器具有实时处理的能力。根据域内乘法的特点,导出域内乘法器的等效按比特与异或逻辑运算形式。FPGA内部有大量的逻辑资源,利用这些逻辑实现的域内乘法器可以工作在更高的频率。将域内除法分解为乘法和求逆两部分,其中求逆运算采用查表法,充分利用FPGA内部SLICE的寄存器资源。仿真表明此译码器可以应用于对处理速度要求苛刻的场合,并且具有实时译码的能力。
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| 关 键 词： | RS译码器 流水线 模块化 实时译码 |
| 收稿时间： | 2012/11/11 0:00:00 |
| 修稿时间： | 2012/12/18 0:00:00 |
FPGA-based Realization of a RS(15,9) Decoder |
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| qupeng,baipeng,limingyang,wangfeng and linjinfu.FPGA-based Realization of a RS(15,9) Decoder[J].Science Technology and Engineering,2013,13(11):2980-2984. |
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| Authors: | qupeng baipeng limingyang wangfeng and linjinfu |
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| Institution: | 2(Equipment management and safety engineering college1 of,Air Force Engineering University; Air Force Engineering University Research Center for Integrated Electronic & Information System and Electronic Countermeasure Technology2,Xi’an 710051,P.R.China; Army Aviation College Second Flying Training Corps3,Houma 043013,P.R.China) |
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| Abstract: | This paper present a solution of RS15,9] decoder based on a new intra-region multiplicator using an FPGA device. The decoder acquires the ability of real-time processing by designing rational, pipeline, modularized structure. Due to the characteristic of intra-region multiplication, derive the logical AND-XOR calculus form according to bit. FPGA has plentiful logical resource, which makes intra-region multiplicator working in the higher frequency section. The intra-region division is divided into multiplication and inverse operation, and the inverse operation adopt the table look-up method, making full use of the SLICE register resource inside the FPGA. The simulation shows this decoder is real-time and suitable for the occasion that requires processing speed rigorously. |
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| Keywords: | RS Decoder pipeline modularization real-time decoding |
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