引入演化效率因子的演化算法设计

随着电子芯片技术的发展，电路系统不断向高集成度和智能化发展。在复杂电磁场环境的各种干扰下，对信息化电子系统的稳定性和可靠性要求越来越高，电子系统的可靠性及自主容错能力成为电路设计所面临的新挑战。为提高恶劣情况下电路的抗干扰能力，提出将分析得到的演化效率因素作为算法的影响因子，引入到演化算法的适应度函数中，对算法进行提高和改进。研究结果表明，在单点短路和断路故障仿真实验中，引入演化效率因子的演化算法的平均无故障概率分别为0.754和0.853。与传统的演化算法相比，两者分别提高了16.4%和14%；与自适应算法相比，两者分别提高了6.7%和5%，证明在受扰或局部损伤的情况下，引入演化效率因子能够有效提升电路系统的鲁棒性及容错抗扰能力。研究结果对改进电路设计的强化及完善有一定的参考价值。

Evolutionary algorithm design based on evolutionary efficiency factor

With the development of electronic chip technology, circuit systems become gradually high integrated and intelligent. Under the interface of complex electromagnetic field environment, the requirements for the stability and reliability of information electronic system are getting more and more urgent. The autonomous fault-tolerant capability and reliability of the circuit system are faced with new challenges in circuit design. In order to improve the anti-interference ability of circuit under bad conditions, the obtained evolutionary efficiency factor after analyses is taken as the influence factor of the algorithm, and it is introduced into the fitness function of the algorithm to improve the algorithm. The research result show that for the single point short circuit and open circuit fault simulation experiments, the average fault-free probabilities of the evolutionary algorithm based on evolutionary efficiency factor are 0.754 and 0.853, respectively; compared with the traditional evolutionary algorithm, the two probabilities increase by 16.4% and 14%, respectively; compared with the adaptive algorithm, the two probabilities increase by 6.7% and 5%, respectively. It is proved that the introduction of evolution efficiency factor can improve the robustness and fault-tolerance ability of the circuit system under the effect of interference or local damage. The research result may provide reference for the reinforcement and optimization of the improved circuit design.