| 大规模集成电路可测性设计及其应用策略 |
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| 引用本文： | 刘峰,梁勇强.大规模集成电路可测性设计及其应用策略[J].玉林师范学院学报,2005,26(5):29-34,63. |
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| 作者姓名： | 刘峰 梁勇强 |
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| 作者单位： | 玉林师范学院,职业技术学院,广西,玉林,537000 |
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| 摘 要： | 随着集成电路的规模不断增大，集成电路的可测性设计正变得越来越重要．综述了可测性设计方案扫描通路法、内建自测试法和边界扫描法，并分析比较了这几种设计方案各自的特点及应用策略．
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| 关 键 词： | 集成电路 可测性设计 内建自测试 边界扫描 |
| 文章编号： | 1004-4671（2005）05-0029-06 |
| 收稿时间： | 2005-03-09 |
| 修稿时间： | 2005-03-09 |
Design for Testability for Large Scale Integrated-Circuit and Its Application Strategy |
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| LIU feng,LIANG yong-qiang.Design for Testability for Large Scale Integrated-Circuit and Its Application Strategy[J].Journal of Yulin Teachers College,2005,26(5):29-34,63. |
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| Authors: | LIU feng LIANG yong-qiang |
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| Abstract: | With the increase of the scale of integrated circuits, and the growing importance of design for testability of IC. In this paper we summarize the scan path solution ,the built-in self test solution and the boundary scan solution of design for testability,analyse and coinpare the character and application strategy of these solutions. |
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| Keywords: | integrated circuit design for testability built-in self test boundary |
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