一种忆阻扫描触发器设计

基于惠普公司的忆阻器模型,提出一种可支持断电模式的选择扫描触发器电路.数据可以从主从触发器中被传输存储到忆阻器中,在触发器被断电期间,忆阻器一直保持该数据.当扫描触发器处于唤醒时刻,忆阻器所保持的数据可以被控制回传到主从触发器中.采用惠普公司提供的忆阻器模拟电路仿真模型进行仿真验证,仿真数据及波形表明,该电路可以满足集成电路的低功耗扫描测试需求.

Design of scan flip-flop based on memristor

A variety of applications based on memristor have been explored after its successful fabricated at HP laboratory in 2008 as a fundamental electronic element. One major challenge when designing low-power CMOS integrated circuit is the lack of standard flip-flop which can support power-off mode. In this paper, we study the characteristics of memristor, a multiplexed flip-flop model based on memristor is proposed which can support power-off mode for scan testing. Data in the master-slave flip-flop can be stored into the memristor, the memristor hold the data during the time of total memristive multiplexed flip-flop is cut off from the power line. At the wake up time, data in the memristor can be recalled back to the master-slave flip-flop. Signal waveforms of the simulation results show that the presented memristive multiplexed flip-flop meet the requirements for low-power scan testing.