钟控判优逻辑电路的研究

在集成数字逻辑电路中,经常遇到多个事件同时或先后请求操作的现象,电路必须对这些事件进行管理、判断和服务,从而出现了各种类型的判优逻辑电路.针对钟控判优逻辑电路进行了分类、定义、解析,列举出相应的电路图,分析了它们的工作过程,并就电路的性能进行了论述,为电路设计人员提供了有效实用具体的设计方案.

A Research on Logic Circuits of Clock- Controlled Judgement Priority

When several events apply operation at one time or successively in integrated digital logic circuits, the circuits are required to administer, judge and serve them. So there exists all sorts of logic circuits of judgement priority. The paper not only classified, defined and analysed logic circuits of judgement priority under the clock - controlled state, but also list their relevant circuits, these working processes were analysed. And furthermore, the capability of the circuits were discussed. Therefore, some effective, applied and idiographic design schemes are offered to circuit devisers.