| LISP机LISP-M1的表处理器设计与实现研究 |
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| 引用本文： | 钱德沛,单德根,郑守淇,贾彪,戴东来,赵银亮.LISP机LISP-M1的表处理器设计与实现研究[J].西安交通大学学报,1988(3). |
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| 作者姓名： | 钱德沛 单德根 郑守淇 贾彪 戴东来 赵银亮 |
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| 作者单位： | 西安交通大学计算机科学与工程系，西安交通大学计算机科学与工程系，西安交通大学计算机科学与工程系，西安交通大学计算机科学与工程系，西安交通大学计算机科学与工程系，西安交通大学计算机科学与工程系 |
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| 摘 要： | 本文介绍一台智能机LISP机LISP-M1中的表处理器LP的体系结构.LP作为后端机挂接在主机上、以微程序直接解释主机生成的与LISP语义接近的中间码,从而缩小了LP的机器语言与LISP的语义差别.LP中设有数据字段装配、字段抽取和匹配电路等专用硬件,以支持动态的数据类型检查和数据标记处理,降低执行时的额外开销.LP还使用大容量的高速硬件堆栈未支持深度嵌套调用和递归的求值过程.本文还将说明LP的设计思想和实现技术.
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| 关 键 词： | 专用计算机 微程序 下堆栈 系统结构 |
DESIGN AND IMPLEMENTATION OF A LIST PROCESSOR IN LISP MACHINE LISP-M1 |
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| Qian Depei,Shan Degen,Zheng Shouqi,Jia Biao,Dai Donglai,Zhao Yinliang.DESIGN AND IMPLEMENTATION OF A LIST PROCESSOR IN LISP MACHINE LISP-M1[J].Journal of Xi'an Jiaotong University,1988(3). |
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| Authors: | Qian Depei Shan Degen Zheng Shouqi Jia Biao Dai Donglai Zhao Yinliang |
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| Institution: | Qian Depei;Shan Degen;Zheng Shouqi;Jia Biao;Dai Donglai;Zhao Yinliang Department of Computer Science and Engineering |
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| Abstract: | This paper presents the architecture of a list processor LP in a Lisp machine LISP-M1.Working as a back end processor attached to a host machine,LP uses microprograms to interpret directly an intermediate code generated by the host.The semantics of the intermediate code is very close to Lisp,so that the semantics gap between the LP machine language and Lisp is narrowed.LP contains special hardware such as data assembly register,data field extracting and matching circuits,for efficient dynamic data type checking and data tagg- ing,which reduces the run-time overhead.A large high speed hardware stack is used to support deeply nested calling and recursive evaluation process,Several design considerations and implementation techniques are also illustrated in this paper. |
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| Keywords: | special-purpose computer microprogram push-doun stack system architecture |
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