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基于FPGA的新型抗混叠CIC抽取滤波器的设计与实现
引用本文:赵伟,王静,刘宇.基于FPGA的新型抗混叠CIC抽取滤波器的设计与实现[J].大连海事大学学报(自然科学版),2007,33(1):99-101.
作者姓名:赵伟  王静  刘宇
作者单位:大连海事大学信息工程学院 辽宁大连116026
摘    要:针对传统的积分梳状滤波器在用作抽取抗混叠滤波器时,通带偏差和混叠镜像衰减难以满足软件无线电系统需要的问题,设计采用内插二阶多项式级联锐化CIC滤波器的改进方法,扩展了其通带带宽的同时提高了阻带衰减,并应用SOPC设计软件dspbuilder在一片FPGA芯片上予以实现,简化了设计流程,降低了成本和开发周期.

关 键 词:积分梳状滤波器  内插二阶多项式  数字变频器  现场可编程门阵列
文章编号:1006-7736(2007)01-0099-03
修稿时间:2006-08-18

New anti-aliasing CIC filter design and realization on FPGA
ZHAO Wei,WANG Jing,LIU Yu.New anti-aliasing CIC filter design and realization on FPGA[J].Journal of Dalian Maritime University,2007,33(1):99-101.
Authors:ZHAO Wei  WANG Jing  LIU Yu
Institution:Information Eng. College, Dalian Maritime Univ. , Dalian 116026, China
Abstract:The bias of passband and aliasing-imaging attenuation of the conventional Cascaded Integrator-Comb(CIC) filter,which is used as anti-aliasing filter for decimating and interpolating,always can't satisfy the requirement of software radio system.In this paper,an improved method with Sharpened CIC filter cascading Interpolated Second-Order Polynomials(ISOP) is proposed,it widens the passband and increases the stopband attenuation.Finally it is implemented on a FPGA chip by SOPC tool: dspbuilder.It simplifies the design flow,reduces the cost and development time.
Keywords:cascaded integrator-comb filter  interpolated second-order polynomials  digital converter  field programable gate array
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