一种新的连通域标记算法

提出一种新的连通域标记算法.与其它适合硬件实现的算法相比,增加了虚警剔除部分,并将一维数组和游程码的结构结合成二维数组的形式进行操作,使新算法在速度、资源占用率、性能上更有优势.算法的Matlab和现场可编程门阵列(FPGA)仿真结果表明,新算法可以完备记录标记和参数信息;应用于要求快速得到准确参数信息的工程时,相比较其他算法,时间减少约50%,且控制逻辑的复杂性减小.

A New Algorithm for Connected Components Labeling

A new connected components labeling algorithm is proposed in this paper. Compared with other algorithms suitable for hardware, it not only increases the function of false alarm removing, but also compounds a one-dimensional array and run-length codes structure into a two-dimensional array structure. The proposed algorithm has great advantages in terms of speed, resource utilization and algorithm performance. Results of simulation based on Matlab and FPGA demonstrate that new algorithm can completely record labels and parameters information. Compared with other algorithms, time consumption would decrease approximately fifty percent and the complexity of the controlling logic is reduced, when this algorithm is used to meet the requests of FPGA application to acquiring parameters' information with high speed and preciseness.