| 快速编码算法的VLSI体系结构设计 |
| |
| 引用本文： | 刘丽娟,邹雪城.快速编码算法的VLSI体系结构设计[J].华中科技大学学报(自然科学版),2006,34(1):46-49. |
| |
| 作者姓名： | 刘丽娟 邹雪城 |
| |
| 作者单位： | 华中科技大学,图像识别与人工智能研究所,湖北,武汉,430074;华中科技大学,图像识别与人工智能研究所,湖北,武汉,430074 |
| |
| 摘 要： | 研究了基于平方误差距离的矢量量化快速编码算法的VLSI体系结构,该结构以模块化思想设计,采用流水线技术、并行处理和设计复用技术提高了系统的处理速度,占用较少的硬件资源,很容易扩展到任意数目的码书,非常适合大尺寸码书的矢量量化编码系统.对结构中的各个模块分别编写了相应的Verilog HDL模型,完成了整个VLSI电路设计,成功地进行了功能仿真和验证.
|
| 关 键 词： | 矢量量化 快速编码 体系结构 |
| 文章编号： | 1671-4512(2006)01-0046-04 |
| 收稿时间： | 01 25 2005 12:00AM |
| 修稿时间： | 2005年1月25日 |
Design of architecture of fast encoding algorithm for vector quantization |
| |
| Liu Lijuan,Zou Xuecheng.Design of architecture of fast encoding algorithm for vector quantization[J].JOURNAL OF HUAZHONG UNIVERSITY OF SCIENCE AND TECHNOLOGY.NATURE SCIENCE,2006,34(1):46-49. |
| |
| Authors: | Liu Lijuan Zou Xuecheng |
| |
| Abstract: | Architecture of a fast encoding algorithm for vector quantization(VQ) was studied on the basis of measurement of squared error.This architecture in modularization improved the processing speed by pipelining,concurrent operating and reusable techniques.It occupied a small amount of hardware resources and was easy to extend to an arbitrary number of codewords,suitable for a VQ encoder with a large size of codebook.Easy module in the architecture was modeled in verilog HDL and implemented in VLSI circuit.The function of the architecture was successfully simulated and verified. |
| |
| Keywords: | vector quantization fast encoding architecture |
| 本文献已被 CNKI 维普 万方数据 等数据库收录！ |
|
