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基于FPGA的FM解调位同步系统设计与实现
引用本文:柴俊栓.基于FPGA的FM解调位同步系统设计与实现[J].科学技术与工程,2009,9(22).
作者姓名:柴俊栓
作者单位:中国空空导弹研究院,洛阳,471009 
摘    要:介绍了一种基于FPGA的FM解调/位同步系统的设计与实现.首先给出了系统的设计方案;然后,介绍了系统的仿真模型及利用Simulink和ModelSim实现对系统HDL代码的联合仿真验证;最后利用Altera公司Stratix II系列FPGA与Analog Device Inc.公司的ADC芯片等完成该FM解调/位同步器系统的硬件实现.

关 键 词:FM解调  位同步器  Simulink与ModelSim联合仿真  FPGA设计
收稿时间:8/10/2009 8:16:00 PM
修稿时间:2009/8/26 0:00:00

Design and Implementation of FM Demodulation and Bit Synchronizer System Based on FPGA
Chai Jun-Shuan.Design and Implementation of FM Demodulation and Bit Synchronizer System Based on FPGA[J].Science Technology and Engineering,2009,9(22).
Authors:Chai Jun-Shuan
Abstract:A design of a FM demodulation and bit synchronizer system based on FPGA is presented, included the designing and implementation. Firstly, designing plan of the system is given in this paper. Then the paper gives out the simulation model of the system. When debugging the HDL code of the FM demodulation and bit synchronization system, the Matlab Link for ModelSim is used for the co-simulation between Matlab Simulink and ModelSim. Lastly, it uses the Stratix II series FPGA of Altera Com. and ADC device of Analog Device Inc. to implement the FM demodulation and bit synchronization system.
Keywords:FM demodulation  Bit Synchronizer  Simulink and ModelSim Co-simulation  FPGA Design
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