| 一种快速循环冗余校验电路的设计 |
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| 引用本文： | 张莹,冯军.一种快速循环冗余校验电路的设计[J].南华大学学报(自然科学版),2011,25(3):46-49. |
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| 作者姓名： | 张莹 冯军 |
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| 作者单位： | 1. 南华大学机械工程学院,湖南衡阳,421001
2. 南华大学电气工程学院,湖南衡阳,421001 |
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| 基金项目： | 衡阳市科技局科技计划基金资助项目(2010KG45) |
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| 摘 要： | 本文简单介绍了循环冗余校验的基本原理．以国际标准CRC-CCITT为研究对象，从串行实现的电路结构出发，通过理论推导，得出了基于逻辑设计的高速CRC并行实现矩阵递推公式．分别设计了这两种结构的CRC-CCITT硬件实现电路，并利用ModelSim6．2软件进行了功能和时序仿真：用16bit位宽的并行CRC电路对32bit数据进行计算，经过2个时钟周期得到校验码．
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| 关 键 词： | 循环冗余校验 现场可编程门阵列 高速并行算法 |
| 收稿时间： | 2011/8/19 0:00:00 |
A Design of Fast CRC Circuit |
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| ZHANG Ying,FENG Jun.A Design of Fast CRC Circuit[J].Journal of Nanhua University:Science and Technology,2011,25(3):46-49. |
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| Authors: | ZHANG Ying FENG Jun |
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| Institution: | 1.School of Mechanical Engineering,University of South China,Hengyang,Hunan 421001,China; 2.School of Electric Engineering,University of South China,Hengyang,Hunan 421001,China) |
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| Abstract: | The basic principles of CRC are briefly introduced in this paper.Taking the study of CRC-CCITT cyclic redundancy check code in international standard,starting from the circuit architecture of CRC serial implementation,the matrix recurrence formula for CRC parallel implementation based on logic analysis is presented by detailed theoretical derivation.The two structures of CRC-CCITT circuits are designed,and the function simulation and timing simulation are carried out using ModelSim6.2;32 bit data was calculated by 16bit parallel CRC circuit,and only two clock period later the CRC-CCITT code was obtained. |
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| Keywords: | CRC FPGA high-speed parallel algorithm |
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