基于Nios II的多路高速数据采集存储系统的实现

为了解决多路高速数据的采集与存储问题, 提出基于FPGA(Field Programmable Gate Array)和Nios II软核技术的设计实现方法。将采集的数据和FPGA 的配置数据共享配置存储器空间, 可以节省额外的存储器件,降低系统成本。实验中以EP2C35F672C8 为控制核心、AD7980 为模数转换器、EPCS64 为存储介质, 实现了15 路模拟信号的完全并行采集。该系统可实现对多路ADC(Analog-to-Digital Converter)的并行控制, 从而实现多路信号的并行高速采集。由于采用了软核技术, 使系统具有很高的灵活性和可扩展性。实验结果表明, 此设计为要求成本低、系统升级频繁的工程提供了新的思路。

Implementation of Multi-Channel High-Speed Data Acquisition and Storage System Based on Nios Ⅱ

In order to realize parallel multi-channel high-speed data acquisition and storage, a method which is based on FPGA(Field Programmable Gate Array) and Nios II is proposed. This system can realize the parallel control of multi-channel ADCs(Analog-to-Digital Converter), to achieve parallel high-speed acquisition of multi-channel signal. The data acquired and the FPGA configuration data can share the configuration memory, which can save the extra storage devices, and reduce the system cost. In the experiment, use EP2C35F672C8 as core, AD7980 as ADC, EPCS64 as the storage medium, to achieve entirely parallel acquisition for 15-channel analog signal. The adoption of soft core technology makes the system more flexible and extensible. The results show that it provides new ideas to projects which requires low cost, frequent system upgrade.