| 基于FPGA的可重构性数字逻辑实验方法 |
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| 引用本文： | 江晋剑.基于FPGA的可重构性数字逻辑实验方法[J].安庆师范学院学报(自然科学版),2011,17(4):127-130,139. |
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| 作者姓名： | 江晋剑 |
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| 作者单位： | 安庆师范学院计算机与信息学院,安徽安庆,246133 |
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| 基金项目： | 安徽省高校省级自然科学研究项目(KJ2009B054)资助 |
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| 摘 要： | 在介绍可编程器件FPGA及其可重构性的基础上,举例说明了基于FPGA的数字逻辑实验的可重构方法,并讨论了基于FPGA的数字逻辑实验的可重构方法相对于传统数字逻辑实验教学的优势。
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| 关 键 词： | FPGA 数字逻辑 可重构 传统逻辑实验 |
Reconfigurable Digital Logic Test Method Based on FPGA |
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| JIANG Jin-jian.Reconfigurable Digital Logic Test Method Based on FPGA[J].Journal of Anqing Teachers College(Natural Science Edition),2011,17(4):127-130,139. |
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| Authors: | JIANG Jin-jian |
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| Institution: | JIANG Jin-jian(School of Computer and Information,Anqing Teachers College,Anhui,Anqing 246133) |
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| Abstract: | This paper firstly introduces FPGA and its reconfiguration,then an example is used to demonstrate the reconfigurable method of logic experiment based on FPGA.Finally,the article is focused on its advantage over traditional logic experiment teaching. |
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| Keywords: | FPGA digital logic reconfiguration traditional logic experiment |
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