| IP设计中低功耗技术的实现及实例应用分析 |
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| 引用本文： | 王晓鹏,朱劲.IP设计中低功耗技术的实现及实例应用分析[J].科技信息,2008(20):38-39. |
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| 作者姓名： | 王晓鹏 朱劲 |
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| 作者单位： | 同济大学电子信息与工程学院 中国上海200092 |
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| 摘 要： | 集成电路进入SoC时代以来，功耗已经成为与面积和性能同等重要的设计目标，在无线、移动和嵌入式应用中，功耗指标甚至成为最重要的因素。本文以一视频处理器IP核为例，深入介绍了低功耗技术在IP设计中的实现及应用效果，为其他IP核的设计提供很好的参考借鉴。
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| 关 键 词： | 低功耗 IP设计 时钟屏蔽技术 多阈值 |
Application and Implementation of low power techniques in IP design |
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| Wang Xiaopeng Zhu Jin.Application and Implementation of low power techniques in IP design[J].Science,2008(20):38-39. |
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| Authors: | Wang Xiaopeng Zhu Jin |
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| Institution: | Wang Xiaopeng Zhu Jin (E.E. Department, Tongji University, Shanghai, China, 200092) |
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| Abstract: | Nowadays, power consumption is perceived as one of the main issues for integrated circuit designers. This paper, taking a video decoder IP as a practical case, applies different low power techniques to optimize the power consumption of the IP core. Moreover, the effectiveness of these techniques can give advice for other IP design. |
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| Keywords: | Low power IP design clock gating multi-threshold |
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