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TRSTR:A Fault-Tolerant Microprocessor Architecture Based on SMT
作者姓名:YANGHua  CUIGang  YANGXiao-zong
作者单位:Fault-tolerantComputingLab,HarbinInstituteofTechnology,Harbin150001,Heilongjiang,China
基金项目:Supported by the 10th5 Year National Defence Pre Research Project (41316.1.2)
摘    要:Based on Simultaneous Multithreading (SMT), we propose a fault-tolerant scheme called Tri-modular Redundantly and Simultaneously Threaded processor with Recovery (TRSTR). TRSTR features as following: First, we introduce an arbitrator context into the conventional SRT (Simultaneous and Redundantly Threaded), which acts as an arbitrator when results from the other two contexts disagree, or acts as an ordinary thread generally, thus making full use of SMT‘s parallelism. Second, we append reconfigurable feature to sphere of replication in SRT, making it more flexible for changing demands and situations. Third, TRSTR has two working modes: Tri-Simultaneous with Voting (TSV) and Dual-Simultaneous with Arbitrator (DSA), which can switch at will. Finally, in addition to transient-fault coverage, TRSTR has on-line self-checking and self-recovering abilities, so as to shield off some permanent faults and reconfigure itself without stopping the crucial job, improving its reliability and availability.

关 键 词:容错技术  微处理器  性能  同步多线程  在线自检查
收稿时间:10 May 2004

TRSTR: A fault-tolerant microprocessor architecture based on SMT
YANGHua CUIGang YANGXiao-zong.TRSTR: A fault-tolerant microprocessor architecture based on SMT[J].Wuhan University Journal of Natural Sciences,2005,10(1):51-55.
Authors:Yang Hua  Cui Gang  Yang Xiao-zong
Institution:(1) Fault-tolerant Computing Lab, Harbin Institute of Technology, 150001 Harbin Heilongjiang, China
Abstract:Based on Simultaneous Multithreading (SMT), we propose a fault-tolerant scheme called Tri-modular Redundantly and Simultaneously Threaded processor with Recovery (TRSTR). TRSTR features as following: First, we introduce an arbitrator context into the conventional SRT (Simultaneous and Redundantly Threaded), which acts as an arbitrator when results from the other two contexts disagree, or acts as an ordinary thread generally, thus making full use of SMT's parallelism. Second, we append reconfigurable feature to sphere of replication in SRT, making it more flexible for changing demands and situations. Third, TRSTR has two working modes: Tri-Simultaneous with Voting (TSV) and Dual-Simultaneous with Arbitrator (DSA), which can switch at will. Finally, in addition to transient-fault coverage, TRSTR has on-line self-checking and self-recovering abilities, so as to shield off some permanent faults and reconfigure itself without stopping the crucial job, improving its reliability and availability. Foundation item: Supported by the 10th5-Year National Defence Pre-Research Project (41316.1.2) Biography: YANG Hua(1974-), male, Ph. D candidate, research direction: fault-tolerant computing, computer architecture, performance evaluation and analysis.
Keywords:fault-tolerant  high-performance  simultaneous multithreading  architecture
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