| 基于数据可靠性的USB接口硬件设计及实现 |
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| 引用本文： | 沈健,于冰,程颖.基于数据可靠性的USB接口硬件设计及实现[J].合肥工业大学学报(自然科学版),2007,30(8):999-1002. |
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| 作者姓名： | 沈健 于冰 程颖 |
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| 作者单位： | 合肥工业大学,电气与自动化工程学院,安徽,合肥,230009 |
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| 摘 要： | 文章从数据和时钟恢复,编解码过程中位填充、位剥离及纠错,PID纠错、数据切换同步和重试机制以及CRC校验等4个方面入手,阐述了基于数据可靠性的USB接口硬件的设计和实现。对所设计接口电路的RTL级、门级仿真以及FPGA验证表明,该设计在功能和时序上符合数据可靠性的要求。
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| 关 键 词： | 数据可靠性 时钟恢复 非归零翻转 循环冗余校验 |
| 文章编号： | 1003-5060(2007)08-0999-04 |
| 修稿时间： | 2006年6月23日 |
Hardware design and implementation of USB interfaces based on data reliability |
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| SHEN Jian,YU Bing,CHENG Ying.Hardware design and implementation of USB interfaces based on data reliability[J].Journal of Hefei University of Technology(Natural Science),2007,30(8):999-1002. |
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| Authors: | SHEN Jian YU Bing CHENG Ying |
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| Abstract: | The hardware design and implementation of USB interfaces based on data reliability are considered from four aspects: sampling of unstable data,bit stuffing/stripping and data error checking,PID checking and the mechanism of data toggle synchronization and retry,and the cyclic redundancy check(CRC).The RTL-level simulation,gate-level simulation and FPGA emulation indicate that the whole design meets the requirement of data reliability in timing and function. |
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| Keywords: | data reliability clock recovery none return to zero invert cyclic redundancy check |
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