同步数字集成电路设计中的时钟树分析

时钟树的设计是同步数字集成电路设计中的一个重要部分，对系统的性能和可靠性有很大影响．文中介绍了同步数字系统的组成和时钟偏移的定义，提出了一种时钟树结构的设计方法，基于该方法用布局布线工具Astro对一个8051芯片进行了自动时钟树分析和指定结构的时钟树分析．结果表明，用文中方法设计时钟树结构能得到比自动时钟树分析更好的效果．文中还给出了设计中门控时钟问题的解决方法。

Clock Tree Analysis in Design of Synchronous Digital Integrated Circuit

In designing synchronous digital integrated circuits, the design of clock tree is an important component, which may greatly affect the performance and reliability of the system. In this paper, the constitution of the synchronous digital system and the definition of clock skew are introduced, and a designing method for clock tree is presented. Based on the proposed method, the automatic clock tree synthesis and the structure-specified clock tree synthesis of 8051 chip are then performed using Astro. The results indicate that, compared with the results obtained by the automatic clock tree synthesis, better results can be obtained by the proposed method. Moreover, the solution to the gate clock is presented.