| A New Implementation of the Post-Stage Tasks of Motion Estimation Using SIMD Architecture |
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| 引用本文： | 张武健,邱晓海,周润德,陈弘毅. A New Implementation of the Post-Stage Tasks of Motion Estimation Using SIMD Architecture[J]. 清华大学学报, 2001, 0(4) |
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| 作者姓名： | 张武健 邱晓海 周润德 陈弘毅 |
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| 作者单位： | ZHANG Wujian，QIU Xiaohai，ZHOU Runde，CHEN Hongyi，Kondo Toshio ，Nakashima Takayoshi ，Ishitani Tsunehachi Institute of Microelectronics，Tsinghua University，Beijing 100084，China; NTT Electronics Corporation，Ebina 243 0432，Japan |
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| 摘 要： | IntroductionThe MPEG2 [1] video compression standard is oneof the key technologies for applications such asdigital broadcasting,storage media,etc.Recently,some single chip video encoders havebeen developed for the MPEG2 standard. Thedevelopment of hardware architecture suitable forsystem integration is the key to single chipimplementation.Motion estimation/compensation is the keypart of a single MPEG2 video encoder chip. It hasa great impact on the chip size,the powerdissipation,and the …
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A New Implementation of the Post-Stage Tasks of Motion Estimation Using SIMD Architecture |
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| Abstract: | |
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| Keywords: | MPEG2 motion estimation single instruction stream over multiple data streams system on a chip |
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