基于FPGA的高速任意分布伪随机数发生器

舍选法是广泛应用的基于均匀分布产生任意分布随机数序列的方法. 文中针对舍选法接受效率低的缺点提出一种改进方案，将舍选法中本该舍弃的样本通过映射转换成可接受的样本，提高了接受效率. 根据改进的舍选法设计了一种任意分布的伪随机数发生器，利用线性反馈移位寄存器产生均匀分布随机数序列，在此基础上运用改进舍选法产生任意分布随机数，并在现场可编程门阵列（field programmable gate array，FPGA）上实现. 对不同分布的实验结果表明，该设计具有输出效率高、通用性强的优点.

High-Speed Arbitrarily Distributed Pseudo-random Number Generator Based on FPGA

Acceptance-rejection is a widely used method to generate arbitrarily distributed pseudo-random numbers from uniformly distributed pseudo-random numbers.This paper proposes a method to improve accepting efficiency.The method transforms samples that are discarded in the original method into acceptable ones to improve efficiency.With the improved acceptance-rejection method,an arbitrarily distributed pseudo-random number generator is designed,which uses a linear feedback shift register to produce uniformly distributed pseudo-random numbers,and then uses the improved acceptance-rejection scheme to generate arbitrarily distributed pseudo-random numbers.The design is implemented on FPGA.The experimental results show that the design has high output efficiency and wide applicability.