| RISC设计和硬件结构 |
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| 引用本文： | 王爱英.RISC设计和硬件结构[J].清华大学学报(自然科学版),1989(4). |
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| 作者姓名： | 王爱英 |
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| 作者单位： | 计算机科学与技术系 |
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| 摘 要： | 精简指令系统计算机（ＲＩＳＣ）以其在性能价格比上所占的优势以及设计周期短等特 点而得到迅速发展。文中讨论了 ＲＩＳＣ的指令系统和硬件实现原则，说明了编译优化的 重要性，并对ＲＩＳＣ进行了性能评价。
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| 关 键 词： | RISC 流水线 指令系统 |
RISC Design and Hardware Architecture |
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| Wang Aiying.RISC Design and Hardware Architecture[J].Journal of Tsinghua University(Science and Technology),1989(4). |
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| Authors: | Wang Aiying |
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| Institution: | Wang Aiying Department of Computer Science and Engineering |
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| Abstract: | Reduced instruction Set Computers (RISC) have the features such as the advantage of price performance and the shorter design cycle. This paper presents the instruction set and the principle of RISC hardware implementation, and explains the importance of compiler optimization. The performance evaluation of RISC is finally discussed. |
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| Keywords: | DISC pipeline instruction set |
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