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基于FPGA的GPS接收机跟踪环路设计与实现
引用本文:姜毅,张淑芳,张晶泊,孙晓文,胡青.基于FPGA的GPS接收机跟踪环路设计与实现[J].大连海事大学学报(自然科学版),2009,35(3).
作者姓名:姜毅  张淑芳  张晶泊  孙晓文  胡青
作者单位:大连海事大学信息科学技术学院,辽宁大连,116026
基金项目:国家自然科学基金资助项目(60572116)
摘    要:为提高GPS基带芯片跟踪环路的性能,提出一种基于FPGA跟踪环路的具体设计与实现方案.研究了GPS接收机跟踪环路的基本原理,在分析现有算法的基础上,采用锁频环辅助锁相环、动态码环和载波环辅助码环策略,利用Xilinx公司FPGA软硬交互工作方式的优点,在一片FPGA芯片上实现整体方案.该设计方案可提高系统的运行效率,节省系统资源,降低硬件成本.试验结果验证了其可行性与有效性.

关 键 词:全球定位系统(GPS)  跟踪环路  锁相环  延迟锁定环  环路滤波器  现场可编程门阵列(FPGA)

Design and implement of GPS receiver tracking loop based on FPGA
JIANG Yi , ZHANG Shu-fang , ZHANG Jing-bo , SUN Xiao-wen , HU Qing.Design and implement of GPS receiver tracking loop based on FPGA[J].Journal of Dalian Maritime University,2009,35(3).
Authors:JIANG Yi  ZHANG Shu-fang  ZHANG Jing-bo  SUN Xiao-wen  HU Qing
Institution:JIANG Yi,ZHANG Shu-fang,ZHANG Jing-bo,SUN Xiao-wen,HU Qing(Information Science , Technology College,Dalian Maritime University,Dalian 116026,China)
Abstract:A design and implementation scheme of GPS receiver tracking loop based on FPGA was proposed to improve the performance of tracking loop.The basic theory of the GPS receiver tracking loop was studied and existing algorithms were analyzed.Using a FLL-assisted PLL loop,a dynamic code loop and a PLL-assisted DLL architecture and taking full advantages of the interworking between hardware and software in Xilinx's FPGA,the scheme was implemented in one FPGA chip,which can improve operation efficiency of the syste...
Keywords:global position system(GPS)  tracking loop  phase locked loop  delay locked loop  loop filter  field programmable gate array(FPGA)  
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