基于FPGA的液晶显示SOPC系统设计

使用Altrera公司提供的IP核来加快开发NiosII外设的速度，提高外设性能，并加上由个人编写的LCD控制器IP核，构建一个软硬件复合的液晶显示SOPC系统．使用FIFO模块作为缓冲解决跨时钟域的问题．使用2个SRAM作为双显存，可以有效避免显存的读写冲突．采用7寸模拟液晶大屏，TFT—LCD工艺制造，真彩256色，性价比高，非常适合应用于工控领域．使用NIOS处理器进行袜子缝头机界面开发，实现了清晰的动态显示．

SOPC system design of LCD based on FPGA

Using IP cores provided by altrera company to accelerate the development NiosII peripheral speed peripheral performance, plus the LCD controller IP core written by individuals, to build a hard- ware and software complex LCD SOPC system. Using the FIFO module as a buffer to solve the problem of cross-clock domain. Two SRAM as dual video memories, can effectively avoid the memory read and write conflicts. 7-inch analog LCD screen of TFT-LCD manufacturing process, the true color of 256 col- ors, cost-effective, very suitable for industrial areas. Using NIOS processors seam machine interface de- velopment, and can achieve a clear dynamic display.