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基于ASIC的128点FFT处理器的设计
引用本文:赖松林,曾益彬,程树英.基于ASIC的128点FFT处理器的设计[J].福州大学学报(自然科学版),2008,36(6):836-840.
作者姓名:赖松林  曾益彬  程树英
作者单位:福州大学物理与信息工程学院,福建,福州,350108
摘    要:所研究的芯片是128点定点FFT处理器,该处理器主要应用于超宽带无线通信系统.采用一种适合于128点快速傅里叶变换(FFT)的混合基-22/2的按频率抽取算法,并在此基础上设计一种并行运算与流水线结构相结合的硬件系统.详细描述了系统状态机的设计,最终实现了一个满足时序和设计工艺要求,达到了以下指标:工作频率66 MHz,芯片面积3.54 mm2,功耗为71.6 mW的高性能的FFT的IP处理器核.

关 键 词:专用集成电路  处理器  快速傅里叶变换  状态机

The design of 128- point FFT processor based on ASIC
LAI Song-lin,ZEN Yi-bin,CHENG Shu-ying.The design of 128- point FFT processor based on ASIC[J].Journal of Fuzhou University(Natural Science Edition),2008,36(6):836-840.
Authors:LAI Song-lin  ZEN Yi-bin  CHENG Shu-ying
Institution:(College of Physics and Information Engineering,Fuzhou University,Fuzhou,Fujian 350108,China)
Abstract:We introduces the design of 128-point fixed-point FFT processor which is primarily applied in the MB-OFDM based UWB system,and based on the radix-22/2 arithmetic of 128-point Fast Fourier Transform(FFT),a parallel and pipeline hardware architecture of FFT processor was designed.Then the state machine of the FFT controller was designed.Finally a FFT IP controller core with high performances was realized,which meets the demand timing and design technology and the whole system reaches the following target: the 66MHz working frequency,the 3.54mm2 area and the 71.6mW power dissipation.
Keywords:ASIC  processor  FFT  state machine
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