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应用于连续时间∑Δ调制器的时钟抖动建模方法
引用本文:严皓,秦鹏,周健军.应用于连续时间∑Δ调制器的时钟抖动建模方法[J].中国科技论文在线,2014(7):758-761.
作者姓名:严皓  秦鹏  周健军
作者单位:上海交通大学微电子学院、模拟与射频集成电路中心,上海200240
基金项目:高等学校博士学科点专项科研基金资助项目(20100073110054)
摘    要:提出了一种能够快速而精确地模拟时钟抖动的建模方法,可应用于连续时间Sigma-Delta调制器(continuous-time sigma-delta-modulator,CT-SDM)等系统的仿真与验证。相较于传统的基于离散时间的建模方法,所提出的一种基于连续时间的模型,可以灵活地应用于各种连续时间电路中,且可在保证精度的情况下,快速完成仿真。给出了关于时钟抖动的理论分析和该模型的数学理论推导,并通过搭建一个完整的连续时间Sigma-Delta调制器,验证了所提时钟抖动方法的正确性与可行性,仿真时间在数十秒内。

关 键 词:时钟抖动  连续时间  sigma-delta调制器

Jitter modeling method for continuous-time sigma-delta modulators
Yan Hao,Qin Peng,Zhou Jianjun.Jitter modeling method for continuous-time sigma-delta modulators[J].Sciencepaper Online,2014(7):758-761.
Authors:Yan Hao  Qin Peng  Zhou Jianjun
Institution:(Center of Analog and Radio-Frequency Integrated Circuits, School of Micro-electronics, Shanghai J iaotong University, Shanghai 200240,China)
Abstract:A fast and accurate method is proposed to model clock j itter for the simulation of systems like continuous-time sigma-delta modulators.Compared to the traditional discrete-time based method,the proposed technique is continuous-time based, which is more convenient and faster in the related simulations for continuous-time systems.The theoretical and mathematical a-nalysis of clock j itter and proposed model are presented to verify its validity.A continuous-time modulator is built,and the simu-lation could be successfully finished in tens of seconds.
Keywords:clock j itter modeling  continuous time  sigma-delta modulator
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