一种改进的Turbo码译码算法及其FPGA实现

为有效降低Turbo码在硬件实现时的译码复杂度并减少其存储资源消耗,将现有Turbo码译码算法中Log-MAP算法和Max-Log-MAP算法进行融合改进,提出一种适于并行计算的改进Max-Log-MAP算法,即在译码计算中间参数的过程中,只将具有多个输入变量的max*(·)运算简化为取最大值的max运算,而对具有2个输入变量的max*(·)运算进行精确计算. 仿真结果表明,改进Max-Log-MAP算法的复杂度可以接近Max-Log-MAP算法,而性能接近Log-MAP算法. 将采用新算法的Turbo码编译码器在现场可编程门阵列(FPGA)上实现,并应用于低轨卫星通信系统(LED)中的,能在保证Turbo编译码优异性能的同时,获得较低复杂度和较低资源消耗,有利于减小卫星手持通信终端的体积,降低功耗. 

FPGA Implementation of an Improved Turbo Decoding Algorithm

In order to effectively reduce Turbo decoding complexity in hardware implementation and reduce its resource consumption, an improved Turbo decoding algorithm named improved-Max-Log-MAP is proposed. This new algorithm is a compromise algorithm between Log-MAP algorithm and Max-Log-MAP algorithm and it's more suitable for parallel calculation. This new algorithm replaces the multi-input operation-max^*(·) with the operation-max which only calculates the maximum value while the algorithm still uses the operation-max^*(·) in the case of two input variables. The simulation results indicate that improved-Max-Log-MAP algorithm's complexity is approximate to Max-Log-MAP algorithm and while the performance is approximate to Log-MAP algorithm. When Turbo codec using the new algorithm is implemented on FPGA and applied to LEO satellite communication systems, it obtains excellent performance with low complexity and resource consumption, which can help reduce power consumption and size of LEO satellite handheld communication terminal.