| 论时序电路的统一设计和统一分析 |
| |
| 引用本文： | 姜田华.论时序电路的统一设计和统一分析[J].哈尔滨商业大学学报(自然科学版),1996(2). |
| |
| 作者姓名： | 姜田华 |
| |
| 作者单位： | 杭州商学院电子系!杭州，310035 |
| |
| 摘 要： | 建立了含有时钟信号的触发器翻转方程 ,讨论了时钟信号的普遍描述 ,并在此基础上提出了同步和异步时序电路的统一设计和统一分析
|
| 关 键 词： | 时序电路 时钟信号 触发器 |
ON UNIFIED DESIGN AND ANALYSISOF SEQUENTIAL CIRCUITS |
| |
| Jiang Tianhua.ON UNIFIED DESIGN AND ANALYSISOF SEQUENTIAL CIRCUITS[J].Journal of Harbin University of Commerce :Natural Sciences Edition,1996(2). |
| |
| Authors: | Jiang Tianhua |
| |
| Abstract: | A turning equation contained a clock signal for flip- flop is establshed and the general expression of the clock signal is then discussed.On basis of the previous discussion, a renewed unified technique for designing and analyzing of both synchroous and asyn- chronous circuits has finally presented.And the effectiveness of the technique was proved by certain practical examples as well. |
| |
| Keywords: | sequential circuit clock singal flip- flop |
| 本文献已被 CNKI 等数据库收录！ |
