| Hierarchical Neural Networks Method for Fault Diagnosis of Large-Scale Analog Circuits |
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| 作者单位： | College of Electric and Information Engineering Hunan University，College of Electric and Information Engineering，Hunan University，College of Electric and Information Engineering，Hunan University，Changsha 410082，China，Changsha 410082，China，Changsha 410082，China |
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| 基金项目： | 国家自然科学基金;高等学校博士学科点专项科研项目;教育部跨世纪优秀人才培养计划;国家高技术研究发展计划(863计划);湖南省科研项目 |
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| 摘 要： | A novel hierarchical neural networks (HNNs) method for fault diagnosis of large-scale circuits is proposed. The presented techniques using neural networks(NNs) approaches require a large amount of computation for simulating various faulty component possibilities. For large scale circuits, the number of possible faults, and hence the simulations, grow rapidly and become tedious and sometimes even impractical. Some NNs are distributed to the torn sub-blocks according to the proposed torn principles of large scale circuits. And the NNs are trained in batches by different patterns in the light of the presented rules of various patterns when the DC, AC and transient responses of the circuit are available. The method is characterized by decreasing the over-lapped feasible domains of responses of circuits with tolerance and leads to better performance and higher correct classification. The methodology is illustrated by means of diagnosis examples.
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Hierarchical Neural Networks Method for Fault Diagnosis of Large-Scale Analog Circuits |
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| TAN Yanghong,HE Yigang,FANG Gefeng. Hierarchical Neural Networks Method for Fault Diagnosis of Large-Scale Analog Circuits[J]. Tsinghua Science and Technology, 2007, 12(Z1): 260-265 |
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| Authors: | TAN Yanghong HE Yigang FANG Gefeng |
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| Abstract: | A novel hierarchical neural networks (HNNs) method for fault diagnosis of large-scale circuits is proposed. The presented techniques using neural networks(NNs) approaches require a large amount of computation for simulating various faulty component possibilities. For large scale circuits, the number of possible faults, and hence the simulations, grow rapidly and become tedious and sometimes even impractical. Some NNs are distributed to the torn sub-blocks according to the proposed torn principles of large scale circuits. And the NNs are trained in batches by different patterns in the light of the presented rules of various patterns when the DC, AC and transient responses of the circuit are available. The method is characterized by decreasing the over-lapped feasible domains of responses of circuits with tolerance and leads to better performance and higher correct classification. The methodology is illustrated by means of diagnosis examples. |
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| Keywords: | arge-scale analog circuits fault diagnosis torn hierarchical neural networks (HNNs) method |
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