面向众核处理器的独立调试系统设计方法

基于片上网络(Network-on-Chip,NoC)技术的众核处理器正成为当前高性能处理器的设计焦点.传统的调试系统结构不能很好地应用于众核处理器体系结构,众核处理器中踪迹数据传输、调试事件传播、时间戳同步等方面均面临重大挑战.为解决上述问题,提出一种具有高带宽、低资源消耗的独立调试系统设计方法.该方法通过减少长互连线,提高了调试通道工作频率,以较少的互连线即可实现高带宽传输通道;同时调试组件采用分布式的对称结构,具有良好的可扩展性.在踪迹数据传输结构中,提出了一种带宽平衡的非侵入式踪迹数据导出方法,该方法通过软硬协同方式来配置踪迹通道仲裁的权重值,降低硬件复杂度.在调试事件的传播上,构建了与片上网络拓扑一致的事件传播网络,该网络在易于物理实现的同时具有事件传播延迟低的特点.在时间戳的同步方法上,提出了一种通过软硬件协同的时间同步方式,以很小的硬件代价实现了较精确的时间戳同步.

Method of Independent Debug System Design for Many-core Processors

Today, the many-core processor based on NoC(Network-on-Chip) is becoming the focus of high performance processor design. While migrating to many-core era, traditional debug architecture is no longer suitable for modern high performance processors. Especially, there are several challenges in the field of debug system for many-core processors, such as trace recording and transferring, debug events broadcasting, timestamp synchronization, and so on. To overcome these challenges, this paper presented an independent debug framework for many-core processors. In the proposed framework, high frequency and high throughput debug channels can be achieved at low connection cost. Moreover, debug components in the framework are distributed and symmetric, and it can be used for further processors with much more cores. On trace transferring, we provided a bandwidth balanced architecture for non-intrusive trace exporting. To reduce the complexity of hardware design, it cooperates with software to configure the weight of trace channel for arbitration. On debug events spreading, we established an event broadcasting network which owns the same topology with NoC and is easy for physical implementation. Meanwhile this network possesses low propagation delay. On timestamp synchronization, we provided a new precise timestamp synchronization method using debug network and independent wires with low hardware cost.