上下文相关算术编码的VLSI结构设计

由于上下文相关算术编码(CAE)方法的良好压缩特性，使其适用于二值形状视频对象的编码．然而CAE配编码所消耗的运算资源较大，不能满足实时视频编码的要求．为了有效减少数据载入次数，提出一种高效的上下文相关算术编码(CAE)的VISI结构．采用延迟线结构保存输入像素，使其在以后的处理中重复利用．实验结果表明，采用这种结构，有效减少了存储器的访问次数，在计算概率索引时，避免了加法操作，从而达到了利用较少的门电路实现高效编码的设计目标．

VLSI Architecture Design for Content-based Arithmetic Coding

Context-based arithmetic coding(CAE)method is adopted for bilevel shape coding of video object because of its high compression efficiency.However, it demands a high computation cost.An efficient VLSI architecture design for shape coding is presented to reduce the computation load.With delay-line architecture, the input data of pixels.Can be saved to make use of them later.The experimental results show that the frequency of accessing memory has been reduced efficiently by the proposed architecture.When calculating probability index,an addition operation can be avoided so ao to realize the design goal of high efficient coding by using fewer gate circuits.