| SDH网管FR系统的设计及其DSP实现 |
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| 引用本文： | 方少元,朱晓波. SDH网管FR系统的设计及其DSP实现[J]. 华南理工大学学报(自然科学版), 2003, 31(6): 60-63 |
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| 作者姓名： | 方少元 朱晓波 |
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| 作者单位： | 华南理工大学,电子与信息学院,广东,广州,510640 |
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| 摘 要： | 论述网管系统中的故障抑制技术FR(Failure Restraint)在同步数字体系(SDH)中的应用以及FR系统的设计原理和实现过程．提出了一种利用DSP串行口DMA通信实现FR系统的在线仿真硬件和软件方案，详细论述了该方案的关键技术，并给出实验结果．研究结果表明本文方法是有效的，并提出进一步改进FR系统的方法．
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| 关 键 词： | 数字信号处理器 同步数字体系 故障抑制 网管技术 |
| 文章编号： | 1000-565(2003)06-0060-04 |
| 修稿时间： | 2002-07-16 |
Design of FR System in SDH Network Management and Its Realization by DSP |
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| Fang Shao-yuan Zhu Xiao-bo. Design of FR System in SDH Network Management and Its Realization by DSP[J]. Journal of South China University of Technology(Natural Science Edition), 2003, 31(6): 60-63 |
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| Authors: | Fang Shao-yuan Zhu Xiao-bo |
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| Abstract: | The application of failure restraint (FR) technology in synchronous digital hierarchy (SDH) , the design theory and realization process of FR system are discussed in this paper. One method to implement FR system by using a DSP series port DMA is presented and the key technology of the whole scheme is analyzed in detail. The experimental results prove the validity of this method and some methods to further improve the FR system are put forward. |
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| Keywords: | digital signal processor synchronous digital hierarchy failure restraint network management tech-nology |
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