基于FPGA的高速并行A/D采样控制电路的设计

给出了一种基于FPGA的高速并行A/D采样控制电路的设计方法.该电路能与各种单片机系统进行友好连接,能够实现高速A/D采集转换和转换后的数据存取.文中以ADC0809为例,详细介绍了含有FIFO存储器的A/D采样控制电路的设计方法,并给出了A/D采样控制电路的VHDL源程序和整个采样存储的顶层电路原理图.

The Design of the A/D Sampling Control Circuit Basing on the High Speed Simultaneous FPGA

The author introduces a kind of designing method of the A/D Sampling Control Circuit basing on the high speed simultaneous FPGA.The circuit can be joined well with all kinds of single-chip computer systems,which can gather and transform the data of A/D at a speed and perform the data access after the conversion as well.Taking ADC0809 as an example in the article,the author explained the designing method of the A/D Sampling Control circuit which includes FIFO memorizer particularly.And the author also presents the VHDL source program of the A/D Sampling Control Circuit and the top level circuit schematic drawing of the entire sampling memorizer.