| 基于Max-Log-MAP算法的Turbo码的硬件设计与实现 |
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| 引用本文： | 刘小同,万国春,陈岚. 基于Max-Log-MAP算法的Turbo码的硬件设计与实现[J]. 江西科技师范学院学报, 2005, 46(4): 8-11,16 |
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| 作者姓名： | 刘小同 万国春 陈岚 |
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| 作者单位： | 1. 同济大学电信学院,上海,200092
2. 江西科技师范学院,江西,南昌,330013 |
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| 摘 要： | Turbo码的应用使得信道编码技术发生了革命性的变化，其译码性能距离Shannon极限只有0．7dB．因而被广泛用于功率受限的无线信道。针对3GPP TS25．212协议给出的WCDMA系统中的Turbo编码器结构．提出了一种硬件实现方法，用Verilog HDL语言描述了译码器各功能模块，并在active HDL中实现了编译和仿真。
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| 关 键 词： | Turbo编／译码器 Max-Log-MAP算法 Verilog硬件描述语言 WCDMA |
| 文章编号： | 1007-2558（2005）04-0008-04 |
| 收稿时间： | 2005-06-28 |
| 修稿时间： | 2005-06-28 |
Turbo Codes'''' Hardware Design and Realization Based on Max-Log-Map Arithmetic |
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| Liu Xiaotong,Wang Guochun,Chen Lan. Turbo Codes'''' Hardware Design and Realization Based on Max-Log-Map Arithmetic[J]. Journal of Jiangxi Science & Technology Normal University, 2005, 46(4): 8-11,16 |
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| Authors: | Liu Xiaotong Wang Guochun Chen Lan |
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| Abstract: | The application of Turbo coding leads to the revolution in coding technology and the performance is within 0.7dB of the Shannon limitation. Hence it is widely used in power-limited wireless system. According to the Turbo coder structure in the WCDMA system defined by 3GPP TS 25.212 agreement, the paper introduces a hardware implementation method, i.e. to use Verilog HDL language to describe the coder function modules, and the code/decode and simulation are achieved. |
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