基于RISC技术的MCU核的设计与研究

介绍了一种基于RISC体系结构的微控制器IP核—8位MCUCore的设计与实现。按照自顶向下的系统级设计思想，利用verilog语言进行寄存器传输级的描述，优化时序控制和结构设计，完成了与主流产品兼容的，具有取指、执行、回写三级流水线，单周期单指令（程序转移指令例外），高速、稳定的IP核。

Design and Research of MCU Core Based in RISC Technique

Design and implementation of 8 - bit MCU I P Core based in system structure of RISC are presented. According to system level design philosophy from top to d own, utilizing verilog HDL for describing RTL, optimizing control of time and design of structure,the IPw hich is compatible with mainstream product, which have four pipelines such as instruction fetch, executive and w rite back, which each instruction can cost only one cycle of the clock except instruction of program transfer,which feature of high speed and stabilization has been completed.