基于CCII的一种双采样保持电路的研究与设计

本文设计了一种高性能双采样保持（DSH）电路，在165V的电源电压下，其性能满足12位精度、200MS／s转换速率的流水线型ADC的要求。设计中采用了轨到轨自偏置第二代电流传输器（CCII）提高了S／H电路的可靠性和线性度；采用双采样结构，使得在同样性能的CCII条件下，采样速率成倍提高；对于大带宽自偏置CCII，采用了两个电流跟随器降低了端口的寄生电阻。DSH电路的采样电压幅度达到2V，对于输入为20MHZ的正弦波，测得其平台稳定精度为89μV，平台稳定时间为1．05ns，噪声失真比（SNDR）达到了84dB，满足12位ADC的要求，整个电路的功耗约为3．41mW。

Researches and Design of A Sample-and-Hold Circuit with Double-sampling in CCII Circuit

A doubling sample-and-hold （DSH） circuit for a 12-bit,200 MS/s ADC under 1.65 V supply voltage is designed in this paper. The second generation current,which is rail to rail self-biased,is used to improve the reliability and linearity in the S/H cicuit. The rate with the double-sample-technology is increased by the sample-and-hoXd circuit under the same CCI1. For the wideband, self-biased, second genera- tional cmwent conveyor, two source followers are implemented for the low parasitic resistance on port X. Simulation results show that the plat- form of stability is 89 μV ; the platform of settle time is 1.05 ns ; the peak signal-to-noise-and-distortion is 84 dB; the sinusoidal input is 20 MHz;the sample voltage swing of the CCII achieves as high as 2V; and the power dissipation of the whole circuit is 3.14 mW.