| 基于FPGA的高速并行A/D采样控制电路的设计 |
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| 引用本文： | 杨守良. 基于FPGA的高速并行A/D采样控制电路的设计[J]. 重庆文理学院学报(自然科学版), 2006, 5(4): 52-54 |
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| 作者姓名： | 杨守良 |
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| 作者单位： | 重庆文理学院,物理与信息工程系,重庆,永川,402160 |
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| 摘 要： | 给出了一种基于FPGA的高速并行A／D采样控制电路的设计方法．该电路能与各种单片机系统进行友好连接，能够实现高速A／D采集转换和转换后的数据存取．文中以ADC0809为例，详细介绍了含有FIFO存储器的MD采样控制电路的设计方法，并给出了A／D采样控制电路的VHDL源程序和整个采样存储的顶层电路原理图。
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| 关 键 词： | 控制电路 设计方法 |
| 文章编号： | 1671-7538（2006）04-0052-03 |
| 收稿时间： | 2006-05-15 |
| 修稿时间： | 2006-05-15 |
The Design of the A/D Sampling Control Circuit Basing on the High Speed Simultaneous FPGA |
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| YANG Shou-liang. The Design of the A/D Sampling Control Circuit Basing on the High Speed Simultaneous FPGA[J]. Journal of Chongqing University of Arts and Scie, 2006, 5(4): 52-54 |
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| Authors: | YANG Shou-liang |
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| Abstract: | The author introduces a kind of designing method of the AID Sampling Control Circuit basing on the high speed simultaneous FPGA. The circuit can be joined well with all kinds of single - chip computer systems, which can gather and transform the data of A/D at a speed and perform the data access after the conversion as well.Taking ADC0809 as an example in the article, the author explained the designing method of the AID Sampling Control circuit which includes FIFO memorizer particularly. And the author also presents the VHDL source program of the A/D Sampling Control Circuit and the top level circuit schematic drawing of the entire sampling memorizer. |
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| Keywords: | FPGA ADC0809 |
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