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基于标准单元模块化放置的集成电路物理设计
引用本文:王沛荣,于忠臣,刘达.基于标准单元模块化放置的集成电路物理设计[J].科技信息,2013(5):75-75,112.
作者姓名:王沛荣  于忠臣  刘达
作者单位:北京工业大学北京市嵌入式系统重点实验室,中国北京100124
摘    要:在集成电路物理设计过程中,降低芯片制造成本,提高芯片性能是提高半导体产品市场竞争力最重要的因素。本文介绍了基于标准单元模块化放置的集成电路设计方法,从而减小芯片的面积,提高芯片的性能。以一款经过TSMC0.35um工艺流片验证的非接触式读卡芯片为例,对比不同方法进行芯片设计的面积、利用率、性能等,从而证明方法的可行性和有效性。

关 键 词:物理设计  标准单元  模块化  自动化

A method of IC physical design based on standard cell modular placemen!
WANG Pei-rong,YU Zhong-chen,LIU Yan-da.A method of IC physical design based on standard cell modular placemen![J].Science,2013(5):75-75,112.
Authors:WANG Pei-rong  YU Zhong-chen  LIU Yan-da
Institution:(Beijing University of Technology, Beijing Embedded System Key I,ab, Beijing,100124. China)
Abstract:About the IC physical design, reducing the chip manufacturing costs and improving the performance of the chip is the most important factor to improve the market competitiveness nf semiconductor prnducts. This paper shows a method of IC physical design based on standard cell modular placement: it can reduce the area of the chip and improving the performance of the chip. Take a non-contact reader chip under TSMC 0.35um processes for example, contrast the area of the chip, utilization and performance in different approaches, and prove the feasibility and effectiveness of the method.
Keywords:Physical design  Standard cell  Modular  Automatic
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