| 基于时频域检测方法的信号处理系统设计与实现 |
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| 引用本文： | 陈耳东,陈禾,韩月秋. 基于时频域检测方法的信号处理系统设计与实现[J]. 北京理工大学学报, 2005, 25(7): 636-640 |
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| 作者姓名： | 陈耳东 陈禾 韩月秋 |
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| 作者单位： | 北京理工大学,信息科学技术学院电子工程系,北京,100081;北京理工大学,信息科学技术学院电子工程系,北京,100081;北京理工大学,信息科学技术学院电子工程系,北京,100081 |
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| 摘 要： | 为解决宽带数字接收机所接收信号参数的高速提取,利用4片现场可编程阵列(FPGA)、分布式多总线并行流水方式完成信号的FFT运算、频域的载频信号参数的提取、IFFT运算及在时域中对脉冲参数的提取.利用有限状态机的方式完成了CPCI总线的PCI局部端接口时序编写及信号处理系统工作状态的控制和转换.用8片244芯片完成了用普通SRAM作类似双口RAM的设计.该项目已通过验收,可应用于实际工程.
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| 关 键 词： | 信号检测 现场可编程门阵列 CPCI总线 有限状态机 分布式多总线 |
| 文章编号： | 1001-0645（2005）07-0636-06 |
| 收稿时间： | 2004-09-24 |
| 修稿时间： | 2004-09-24 |
Design and Realization of a Signal Processing System Based Detecting Technique in Time Domain and Frequency Domain |
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| CHEN Er-dong,CHEN He and HAN Yue-qiu. Design and Realization of a Signal Processing System Based Detecting Technique in Time Domain and Frequency Domain[J]. Journal of Beijing Institute of Technology(Natural Science Edition), 2005, 25(7): 636-640 |
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| Authors: | CHEN Er-dong CHEN He HAN Yue-qiu |
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| Affiliation: | Department of Electronic Engineering, School of Information Science and Technology, Beijing Institute of Technology, Beijing100081, China;Department of Electronic Engineering, School of Information Science and Technology, Beijing Institute of Technology, Beijing100081, China;Department of Electronic Engineering, School of Information Science and Technology, Beijing Institute of Technology, Beijing100081, China |
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| Abstract: | In order to get the parameters of the signals rapidly in the wideband receivers, a new system with four pieces of field programming gate array(FPGA) was designed. This new system can accomplish FFT calculation, extract the parameters of the carrier frequency signals in the frequency domain, in turn, it can complete IFFT calculation and detect the parameters of the pulse signals in the time domain by using the method of distributing multi-bus, parallel and pipelining. Moreover, with the finite state machine technique, the program of the PCI local time sequence in the CPCI bus was presented and the control and conversion of the signal processing conditions were realized. The similar dual port RAM was demonstrated with eight pieces of 244 and some SRAM. The project has been passed checkup and may be applied in the practical engineering. |
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| Keywords: | signal detection field programming gate array compact peripheral component interconnect bus finite state machine distributing multi-bus |
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