基于闪存系统的多进制LDPC码译码研究

为了进一步提高闪存系统的可靠性,基于闪存系统的分级调制架构,提出了一种新的多进制LDPC(low density parity check)码译码算法?该译码算法引 入了预处理过程以纠正分级解调器输出的非法符号,通过变量节点和校验节点的迭代运算纠正由噪声干扰带来的错误符号?在迭代运算过程中,变量节点的更新条件设计为只有在不满足2个以上检验和的情况下,才更新该变量节点的符号;且在更新变量节点符号时,考虑到分级调制架构容易出现的相邻换位错误,以及噪声对各单元层次造成的不同影响,选择较有可能被发送的那个符号作为更新符号?仿真结果表明,提出的译码算法性能优于已有的译码算法;通过对比不同的变量节点更新条件得出,设计的更新条件具有更好的性能?

Decoding for non-binary LDPC codes in flash memory systems

In order to improve the reliability of flash memory systems,a novel decoding algorithm for non-binary low-density parity-check (LDPC)codes is proposed based on the rank modulation (RM) scheme of flash memory systems.In the proposed algorithm,a preprocessing is added before decoding to correct the illegal symbols outputted by the rank demodulator.The iterative decoding is accomplished by the operations carried out alternatively in variable-node side and check-node side to correct the errors caused by noise.Within the iterative decoding, a more effective updating condition is designed,where a variable node won''t be updated unless it can''t satisfy more than two check sums.When updating a variable node,the adjacent transposition errors frequently occurring in a RM scheme and the different effects of noise on the levels of different cells are taken into consideration and the symbol with more possibility of being transmitted is chosen to update the variable node.Simulation results show that the proposed decoding algorithm outperforms the existing algorithm, and moreover the designed updating condition is shown to have better performance than other conditions.